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 HAT2114R, HAT2114RJ
Silicon N Channel Power MOS FET High Speed Power Switching
REJ03G0120-0100Z (Previous ADE-208-1544(Z)) Rev.1.00 Oct.06.2003
Features
* * * * Low on-resistance Capable of 4.5V gate drive High density mounting "J" is for Automotive application High temperature D-S leakage guarantee Avalanche rating
Outline
SOP-8
8 5 76
3 12 78 DD 56 DD
4
2 G
4 G
S1
S3
1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain
MOS1
MOS2
Rev.1.00, Oct.06.2003, page 1 of 9
HAT2114R, HAT2114RJ
Absolute Maximum Ratings
(Ta = 25C)
Ratings Item Drain to source voltage Gate to source voltage Drain current Drain peak current Avalanche current Avalanche energy Channel dissipation Channel dissipation Channel temperature Storage temperature Notes: 1. 2. 3. 4. Symbol VDSS VGSS ID ID (pulse) IAP
Note4 Note4 EAR Note1
HAT2114R 60 20 6 48 -- -- 2 3 150 -55 to +150
HAT2114RJ 60 20 6 48 6 3.08 2 3 150 -55 to +150
Unit V V A A A mJ W W C C
Pch
Note2
PchNote3 Tch Tstg
PW 10s, duty cycle 1% 1 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10 s 2 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10 s Value at Tch = 25C, Rg 50
Rev.1.00, Oct.06.2003, page 2 of 9
HAT2114R, HAT2114RJ
Electrical Characteristics
(Ta = 25C)
Item Drain to source breakdown voltage Symbol Min V(BR)DSS 60 Typ -- -- -- -- -- -- -- 9.5 28 40 1000 145 85 15 2 3 12 10 60 11 0.82 40 Max -- -- 1 -- 10 10 2.5 -- 32 50 -- -- -- -- -- -- -- -- -- -- 1.07 -- Unit V V A A A A V S m m pF pF pF nC nC nC ns ns ns ns V ns VDD = 25 V VGS = 10 V ID = 6A VGS = 10 V, ID= 3 A VDD 30 V RL = 10 RG =4.7 IF = 6 A, VGS = 0Note5 IF = 6A, VGS = 0 diF/dt = 100 A/s Test Conditions ID = 10 mA, VGS = 0 IG = 100 A, VDS = 0 VDS = 60 V, VGS = 0 VDS = 48 V, VGS = 0 Ta = 125C VGS = 16 V, VDS = 0 VDS = 10 V, ID = 1 mA ID = 3 ANote5, VDS = 10 V ID = 3 ANote5, VGS = 10 V ID = 3 ANote5, VGS = 4.5 V VDS = 10V, VGS = 0 f = 1 MHz
Gate to Source breakdown voltage V(BR)GSS 20 Zero gate voltage drain current Zero gate voltage drain current HAT2114R IDSS IDSS IGSS VGS(off) |yfs| RDS(on) RDS(on) Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDF -- -- -- -- 1.5 6 -- -- -- -- -- -- -- -- -- -- -- -- -- --
HAT2114RJ IDSS
Gate to source leak current Gate to source cutoff voltage Forward transfer admittance Static drain to source on state resistance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage
Body-drain diode reverse recovery trr time Notes: 5. Pulse test
Rev.1.00, Oct.06.2003, page 3 of 9
HAT2114R, HAT2114RJ
Main Characteristics
Power vs. Temperature Derating 4.0
Pch (W)
Maximum Safe Operation Area 100 30
(A)
Test condition. When using the glass epoxy board. (FR4 40 x 40 x 1.6 mm), (PW 10s)
10
10
PW
s
3.0
10 3 1 0.3
DC Op era tio
Channel Dissipation
Drain Current ID
=1
1m
0
s
s
s
0m
2.0
1 Dr ive
2
1.0
Op
(P W No 0.1 Operation in < 1 te this area is 0s 6 ) 0.03 limited by RDS(on)
n
ive Dr Op er at ion
er
at
ion
0
50 100 Case Temperature
150 Ta (C)
200
0.01 Ta = 25C 0.003 1 shot Pulse 1 Drive Operation 0.001 0.1 0.3 1 3 10 Drain to Source Voltage
30 100 VDS (V)
Note 6: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm)
Typical Output Characteristics 10 10 V 4V
(A)
Typical Transfer Characteristics 10 VDS = 10 V Pulse Test
(A) Drain Current ID
Pulse Test 8
8
Drain Current ID
6 3V 4
6
4 Tc = 75C 2 25C -25C 0 1 2 3 Gate to Source Voltage 4 5 VGS (V)
2 VGS = 2.5 V 0 2 4 6 Drain to Source voltage 8 10 VDS (V)
Rev.1.00, Oct.06.2003, page 4 of 9
HAT2114R, HAT2114RJ
Drain to Source Saturation Voltage vs. Gate to Source Voltage Pulse Test
Drain to Source on State Resistance RDS(on) () Drain to Source Saturation Voltage VDS(on) (V)
0.3
Static Drain to Source on State Resistance vs. Drain Current 1.0 Pulse Test 0.5 0.2 0.1 VGS = 4.5 V 10 V
0.2 ID = 5 A 0.1 2A 1A 0 20 15 5 10 Gate to Source Voltage VGS (V)
0.05
0.02 0.01 1
10 30 3 Drain Current ID (A)
100
Static Drain to Source on State Resistance RDS(on) ()
Forward Transfer Admittance |yfs| (S)
Static Drain to Source on State Resistance vs. Temperature 0.10 Pulse Test 0.08 1, 2 ,5A
Forward Transfer Admittance vs. Drain Current 50 20 10 5 2 1 0.5 0.1 VDS = 10 V Pulse Test 0.3 1 3 10 30 Drain Current ID (A) 100 Tc = -25C 25C 75C
0.06 VGS = 4.5 V 0.04 1, 2, 5 A 0.02 0 -40 10 V
0 40 80 120 160 Case Temperature Tc (C)
Rev.1.00, Oct.06.2003, page 5 of 9
HAT2114R, HAT2114RJ
Body-Drain Diode Reverse Recovery Time 1000
Reverse Recovery Time trr (ns)
Typical Capacitance vs. Drain Source Voltage 5000
500
di / dt = 100 A / s VGS = 0, Ta = 25C
Capacitance C (pF)
2000 1000 500 200 100 50 Crss 20 10 VGS = 0 f = 1 MHz 0 10 20 30 40 50 Drain Source Voltage VDS (V) Coss Ciss
200 100 50
20 10 0.1
0.3
1
3
10
30 IDR (A)
100
Reverse Drain Current
Dynamic Input Characteristics 100
VDS (V) VGS (V)
Switching Characteristics 20 1000 300 100 td(off) 30 10 3 1 0.1 tr td(on) tf VGS = 10 V, VDD = 30 V PW = 5 s, duty < 1 % 0.3 1 3 Drain Current 10 30 ID (A) 100
ID = 6 A VGS
Drain to Source Voltage
12
40
8
20
VDD = 50V 25V 10V 8 16 24 32 Gate Charge Qg (nc)
4 0 40
0
Rev.1.00, Oct.06.2003, page 6 of 9
Gate to Source Voltage
Switching Time t (ns)
80 V = 50 V DD 25 V 10 V 60 V DS
16
HAT2114R, HAT2114RJ
Reverse Drain Current vs. Source to Drain Voltage
Repetitive Avalanche Energy EAR (mJ)
Maximum Avalanche Energy vs. Channel Temperature Derating 4.0 IAP = 6 A VDD = 25 V L = 100 H duty < 0.1 % Rg > 50
20
(A)
Reverse Drain Current IDR
16 10 V 12 5V 8
Pulse Test
3.2
2.4
VGS = 0, -5 V
1.6
4
0.8 0 25
0
0.4 0.8 1.2 1.6 2.0 Source Drain Voltage VSD (V)
50 75 100 125 150 Channel Temperature Tch (C)
Avalanche Test Circuit EAR =
Avalanche Waveform 1 2 * L * I AP * 2 VDSS VDSS - V DD
V DS Monitor
L I AP Monitor
V (BR)DSS I AP VDD ID V DS
Rg Vin 15 V
D. U. T
50 0 Switching Time Test Circuit Vout Monitor D.U.T. RL Vout Vin 10 V V DS = 30V td(on) 10% 90% tr 90% td(off) tf 10% Vin 10% VDD
Switching Time Waveform 90%
Vin Monitor Rg
Rev.1.00, Oct.06.2003, page 7 of 9
HAT2114R, HAT2114RJ
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)
Normalized Transient Thermal Impedance s (t)
10
1
D=1 0.5
0.2
0.1
0.1 0.05
0.02
0.01
0.01
0.001
1s
h
p ot
uls
e
ch-f(t) = s (t) * ch - f ch-f = 125C/W, Ta = 25C When using the glass epoxy board (FR4 40x40x1.6mm)
PDM PW T
D=
PW T
0.0001 10
100
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation)
Normalized Transient Thermal Impedance s (t)
10
1
D=1 0.5
0.2
0.1
0.1 0.05
0.02
0.01
0.01
ch-f(t) = s (t) * ch - f ch-f = 166C/W, Ta = 25C When using the glass epoxy board (FR4 40x40x1.6mm)
pu lse
PDM PW T
0.001
1s
t ho
D=
PW T
0.0001 10
100
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (S)
Rev.1.00, Oct.06.2003, page 8 of 9
HAT2114R, HAT2114RJ
Package Dimensions
As of January, 2003
Unit: mm
4.90 5.3 Max 5 8
1
4
3.95
*0.22 0.03 0.20 0.03
1.75 Max
0.75 Max
6.10 - 0.30
+ 0.10
1.08 0 - 8
+ 0.67
0.14 - 0.04
+ 0.11
1.27
0.60 - 0.20
*0.42 0.08 0.40 0.06
0.15 0.25 M
*Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms -- 0.085 g
Rev.1.00, Oct.06.2003, page 9 of 9
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
RENESAS SALES OFFICES
Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500 Fax: <1> (408) 382-7501 Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001
http://www.renesas.com
(c) 2003. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon 1.0


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